1. Field of the Invention
The present invention relates to package structures, and more particularly, to a package structure having an embedded electronic component and a fabrication method thereof.
2. Description of Related Art
Along with the progress of semiconductor packaging technologies, various package types have been developed for semiconductor devices so as to meet demands for highly integrated and minimized package structures. For example, wire-bonding packages or flip-chip packages allow semiconductor chips to be electrically connected to lead frames through gold wires or electrically connected to packaging substrates through solder bumps.
FIG. 1 is a cross-sectional view of a conventional flip-chip package structure. The package structure 1 has a packaging substrate 10 having a chip-mounting surface 10a with solder bumps 100 disposed thereon and a ball-mounting surface 10b opposite to the chip-mounting surface 10a, a semiconductor chip 11 mounted on the solder bumps 100 of the packaging substrate 10 through a plurality of tin balls 110, and a plurality of solder balls 16 mounted on the ball-mounting surface 10b of the packaging substrate 10.
However, since the circuit of the packaging substrate 10 has a small size, the pitch of the tin balls 110 of the chip 11 cannot be reduced. As such, the package structure 1 cannot meet the miniaturization requirement.
Further, the solder bumps 100 of the packaging substrate 10 and the tin balls 110 of the chip 11 result in a too long signal transmission path between the chip 11 and the packaging substrate 10 and cause the signal transmission path to pass through different media (the solder bumps 100 and the tin balls 110), thereby easily resulting in signal losses.
Therefore, there is a need to provide a package structure and a fabrication method thereof so as to overcome the above-described drawbacks.